FIG. 1 depicts a conventional magnetic random access memory (MRAM) 10. The conventional MRAM 10 includes a row address decoder 12, a read control and digital line driver 14, a column address decoder 16, a write bit line driver 18, a digital line driver 20, a read control and write bit line driver 22, comparators 24, magnetic storage cells 25 each of which includes a magnetic tunneling junction (MTJ) 26 and a transistor 28, digital lines 30, word read lines 32, bit sense lines 34, bit lines 36, bit select lines 38, and word lines 40. In the conventional MRAM 10, the MTJ 26 has a free layer, an insulating tunneling barrier layer, and a pinned layer. Use of a conventional MTJ stack makes it possible to design an MRAM cell with high integration density, high read/write speed, and low read power.
The conventional MRAM 10 utilizes the digital lines 30, word read lines 32, bit sense lines 34, bit lines 36, bit select lines 38, and word lines 40 to program a magnetic storage cell 25. In order to describe the operation of the conventional MRAM 10, reading and programming of a particular magnetic storage cell 25, the magnetic storage cell 25-1, will be described. However, one of ordinary skill in the art will readily recognize that the conventional MRAM 10 functions similarly for writing to another cell. One of ordinary skill in the art will readily recognize that by driving the lines 30 and 36, the conventional MRAM 10 can write in parallel, and through the lines 34 and 36, the conventional MRAM 10 can read cells in parallel.
To write a data into the magnetic storage cell 25-1, a particular word line 40, the word line 40-1, is selected first. Similarly, a particular bit select line 38, bit select line 38-1, is also selected. Because the word line 40-1 is selected, a write current is passed through a corresponding digit line 30, the digital line 30-1, using the read control and digital line driver 14 and digital line driver 20. The direction of current driven through the digital line depends upon whether the data to be input corresponds to writing a digital “0” or a digital “1”. Through write bit line driver 18, another write current is driven through an appropriate bit line 36, the bit line 36-1. The currents from the digital line 30-1 and bit line 36-1 cross at or near the MTJ 26. A combined magnetic field produced is sufficiently large to switch the magnetization direction of the free layer of the MTJ 26. Thus the combined magnetic field defines the state (for example either logical “0” or a logical “1”) of the memory cell. Note at high density, this combined field may disturb the adjacent magnetic cells.
To read the data stored in the storage cell 25-1, the word line 30-1 and bit select line 38-1 are selected. Using the read control and digital line driver 14, line 32-1 is driven and the transistor 28 for the storage cell 25-1 turned on. A read current then passes via the bit line 36-1 through the MTJ 26 and transistor 28 to ground. Consequently, stored data is read by sensing the voltage on the appropriate line, line 36-1 through the sense line 34-1.
Although the conventional MRAM functions 10, one of ordinary skill in the art will readily recognize that there are drawbacks. Programming, for example for each storage cell 25, uses magnetic fields due to current driven through the corresponding lines, such as lines 30 and 36. The magnetic fields are not a localized phenomenon. In addition, a relatively large current corresponding to a relatively large magnetic field is used to program the storage cells 25. Consequently, the nearby cells may be disturbed or inadvertently written. As a result, performance of the conventional MRAM 10 suffers.
Accordingly, what is needed is a magnetic memory having improved performance. The present invention addresses such a need.